The invention relates to a method for contacting SIPOS-passivated semiconductor zones of a semiconductor body with at least one pn junction and where part of the surface of the semiconductor body is protected by an oxide layer.
The use of so-called SIPOS passivation layers (Semi-lnsulating-Poly-Silicon) for the manufacture of semiconductor components, in particular of high-voltage power transistors, is known. In general, a double layer is applied where the first layer is of O-SIPOS (oxygen-doped) and the second layer is of N-SIPOS (nitrogen-doped). To manufacture a SIPOS double layer of this kind, it is customary to apply a CVD (Chemical Vapor Deposition) process.
Before the places to be contacted, for example, the emitter or base zones, can come into contact with a metallization that is usually made of aluminum, it must first be ensured, with the help of a so-called contact opening process, that the N-SIPOS, O-SIPOS and oxide layers previously applied in other steps of the process are removed again from these places. Frequently, the contact opening is accomplished by a wet chemical etching, and less frequently by a plasma etching process because of the considerably greater technological effort involved. Another possibility, which also involves a great deal of technological effort, is to make the contact in several masking steps. In most cases, however, the contact opening process applied is that of wet chemical etching, the process involving little technology. A disadvantage of this etching method is that hollow spaces are often formed between the passivation layers and a metallization due to under-etching, as well as discontinuities in the metallization.